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#71
Originally Posted by fms View Post
Please, correct me if I am wrong, but I doubt this one makes sense, as flash memory appears to be written in 256kB pages. So, the original number of 5 that translates into 32*4096=128kB makes more sense. You may even increase it to 6!
I just repeat myself (I posted it somewhere near swapiness thread) -

The flash block size is 128KBytes typical. That means - if you write a smaller block it is possible that hardware READS 128KB before, replace your small portion and write back. In this case it has a big sense to write by N * 128KB blocks to eliminate reads.

However, if you write sequentially, a smart hardware may have some buffering and it may determine that your next write is in the same 128KB block and combine it. In this case a size of page cluster less 128KB may have sense because it allows kernel interrupt page write operation and it accelerates a device reaction.

Unfortunately, I don't know - is eMMC hardware smart enough.